4D Gaussian Splatting (4DGS) enables high-quality real-time novel-view synthesis for dynamic scenes, supporting free-viewpoint video, mobile XR, and autonomous systems at the edge. Methods using explicit 4D distributions, keyframe interpolation, or anchor binding share two GPU data-movement bottlenecks. Temporal filtering follows model record loading, wasting LPDDR5 bandwidth on inactive data. Frame-isolated execution also overlooks highly overlapping active sets and depth relationships across adjacent frames, reloading shared attributes when working sets exceed on-chip cache capacity. To address these bottlenecks, we present GSPIM, a temporal-locality-aware 4DGS accelerator for PIM-enabled edge devices. Polymorphic PIM adapts a shared near-memory datapath to representation-specific field layouts and selection procedures. It filters and compacts valid data into contiguous inputs before the GPU accesses complete attributes, reducing ineffective transfers. Multi-Frame Rendering Dataflow reuses active attributes and stable depth relationships within a temporal window, reducing repeated work across frames. Hybrid Dataflow Scheduling overlaps near-memory data preparation with GPU rendering to reduce waiting. Evaluation combines a GPU-PIM model calibrated to Jetson AGX Orin 64 GB with a 1z DRAM physical implementation of the added circuits. Across three 4DGS methods and six dynamic scenes, GSPIM achieves a 4.15x geometric-mean speedup and a 4.99x geometric-mean energy-efficiency improvement over a fully optimized frame-by-frame GPU baseline. The maximum scene-level PSNR difference is 0.011 dB, and the added physical footprint is 18.7172 square millimeters across 32 LPDDR5 dies.
@inproceedings{ma2027gspim,title={GSPIM: A Temporal-Locality-Aware 4D Gaussian Splatting Accelerator with Polymorphic PIM and Multi-Frame Rendering Dataflow},author={Ma, Zirui and Fan, Zhihua and Wu, Haibin and Fan, Dongrui and Ye, Xiaochun and Li, Wenming},booktitle={33rd IEEE International Symposium on High-Performance Computer Architecture},year={2027},}
Awarded all three MICRO 2026 Artifact Evaluation badges: Artifacts Available, Artifacts Evaluated - Functional, and Results Reproduced. Artifact Evaluation · Evaluated Artifact
Depth-guided, cost-volume-based Generalizable 3D Gaussian Splatting (G-3DGS) encoders reconstruct scenes as sets of Gaussian primitives directly from multi-view images without requiring per-scene optimization, thereby facilitating feed-forward novel-view synthesis on edge computing platforms. However, their shared encoder architecture presents two primary bottlenecks. First, the per-pixel depth search disregards semantic similarity within the 2D feature space, causing depth search operations to account for over 65% of memory traffic due to redundant exhaustive candidate scans. Second, the sequential pipeline of depth prediction followed by Gaussian generation neglects local 3D geometric continuity, resulting in more than 52% of generated Gaussians being redundant prior to instantiation. In this paper, we introduce SCARF, a dataflow-co-designed accelerator that aligns each bottleneck with a corresponding scene-level regularity. To mitigate the first bottleneck, Feature Similarity Depth Reuse reconceptualizes depth search as a problem of semantic locality: depth consistency is determined by affinity in feature space rather than physical address proximity. It transforms exhaustive per-pixel depth searches into anchor-centered local searches. To overcome the second bottleneck, Scene-Adaptive Early Sparsification disrupts the conventional serial depth-to-materialization boundary by probing each tile to infer local scene regularity. It then selectively activates only the minimally sufficient generation pathway, eliminating redundant Gaussian computations before primitive instantiation. On a 27.8 square millimeter 28 nm post-layout design, SCARF delivers a 2.94x geometric-mean end-to-end speedup with maximum PSNR degradation below 0.072%, 2.23 inferences per joule, and 34.5x GPU energy efficiency.
@inproceedings{ma2026scarf,title={SCARF: A Scene-Adaptive Depth-Guided G-3DGS Encoder Accelerator with Semantic Reuse and Fused Dataflow},author={Ma, Zirui and Fan, Zhihua and Wu, Haibin and Li, Wenxing and Zhang, Fulin and Fan, Dongrui and Ye, Xiaochun and Li, Wenming},booktitle={59th IEEE/ACM International Symposium on Microarchitecture},year={2026},}
Speculative decoding enhances the inference efficiency of large language models (LLMs) by generating drafts using a small draft language model (DLM) and verifying them in batches with a large target language model (TLM). However, adaptive drafting inference on a mobile single-NPU-PIM system faces idle overhead in traditional operator-level synchronous execution and wasted computation in asynchronous execution due to fluctuations in draft length. This paper introduces AHASD, a task-level asynchronous mobile NPU-PIM heterogeneous architecture for speculative decoding. Notably, AHASD achieves parallel drafting on the PIM and verification on a single NPU through task-level DLM-TLM decoupling and specifically, it incorporates Entropy-History-Aware Drafting Control and Time-Aware Pre-Verification Control to dynamically manage adaptive drafting algorithm execution and pre-verification timing, suppressing invalid drafting based on low-confidence drafts. Additionally, AHASD integrates Attention Algorithm Units and Gated Task Scheduling Units within LPDDR5-PIM to enable attention link localization and sub-microsecond task switching on the PIM side. Experimental results for different LLMs and adaptive drafting algorithms show that AHASD achieves up to 4.2x in throughput and 5.6x in energy efficiency improvements over a GPU-only baseline, and 1.5x in throughput and 1.24x in energy efficiency gains over the state-of-the-art GPU+PIM baseline, with hardware overhead below 3% of the DRAM area.
@inproceedings{ma2026ahasd,title={AHASD: Asynchronous Heterogeneous Architecture for LLM Adaptive Drafting Speculative Decoding on Mobile Devices},author={Ma, Zirui and Fan, Zhihua and Li, Wenxing and Wu, Haibin and Zhang, Fulin and Li, Wenming and Ye, Xiaochun},booktitle={Proceedings of the 63rd ACM/IEEE Design Automation Conference},series={DAC '26},pages={1--7},month=jul,year={2026},publisher={ACM},doi={10.1145/3770743.3803965},}
Structured sparsity is a promising approach to scaling large-language-model (LLM) inference, but existing forms such as block-diagonal matrices, FFT mixing, and butterfly factorization map inefficiently to GPUs due to deep stage dependencies and limited bulk parallelism. This paper presents MLX, an algorithm-architecture co-design that proposes a unified structured-sparse transformer framework combining semantic-aware FFT, hierarchical butterfly sparsity, and structured attention, and maps it efficiently onto spatial dataflow architectures. MLX is built on Closed Dependency Components (CDCs), a formal abstraction for deterministic forward-only dataflow regions that can be folded across layers and pipelined on compact meshes. Based on this abstraction, MLX introduces a multi-layer execution model with bounded-hop skip-hop routing, tag-based scheduling, and decoupled compute/transfer pipelines to overlap communication and computation across deep operators. We prototype MLX in 12 nm and show that it achieves 3.2x speedup and 3.0x energy savings over Jetson Xavier. A transformer-specialized reduced design further delivers up to 5.7x speedup over prior sparse accelerators. MLX also scales nearly linearly to 8x8 meshes and remains effective for long sequences from 1K to 4K, demonstrating that structured operator semantics can be translated into efficient spatial execution for sparse LLMs.
@inproceedings{wu2026mlx,title={MLX: Multi-Layer Execution for Structured LLM Workload Acceleration on Spatial Architectures},author={Wu, Haibin and Li, Wenming and Fan, Zhihua and Ma, Zirui and Liu, Yuqun and Xia, Tengfei and Liu, Yanhuan and Zhang, Kunming and Ye, Xiaochun and Fan, Dongrui and Weng, Jian},booktitle={53rd IEEE/ACM International Symposium on Computer Architecture},pages={1--16},month=jun,year={2026},doi={10.1109/ISCA66397.2026.00017},}